By Stan Kelly-Bootle

Ebook via Kelly-Bootle, Stan, Fowler, Bob

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Additional info for 68000, 68010, 68020 Primer

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Figure 2 -5 shOOJS a typical MC68000 single board computer (from Educational Microcomputer Systems, Irvine, California) complete with 20 K-bytes RAM, 16 K- bytes EPROM and various va support chips). 44 68000,68010, and 68020 Primer M68000 MATH FAMILY BUS PROCESSING ARBITRATION DISK STORAGE CONTROLLERS MC6881 FPCP MPU MC68230 MC68451 MMU DDMA PIfT MEMORY MANAGEMENT DMAC MC68901 MFP DMA M6800 MPCC EPCI GENERAL PURPOSE DUART 1/ 0 DUSCC 510 DATA COMM Fig. 2-4 M68000 Family and Supporting Chips THE M68000 SUCCESS STORY Nowadays, it takes a lot more than excellent price-performance hardware to gain success in the microcomputer marketplace.

Are consists of tructed lists of s available hardware step I rnory before n reach that COMPATIBILITY An essential concept throughout the industry is compatibility the idea of hardware and software elements throughout the system IJJOrk ng together in harmony. We will reserve the VJOrd system for an organized atching set of devices and programs. Hardware and software exist today in a dazzling profus on of shapes, flavors, and sizes, and creating a system from diverse com pone ts, even when you buy from a single manufacturer, is no trivial matter.

A typical prefetch strategy involves having three instructions passing through the MPU at anyone time - one being executed, one being decoded, and one being fetched. In pipelining a greater number of instructions may be passing through. These steps often require different system resources, provided the chip has the necessary buffers and pathways. If, as will happen from time to time, there is a clash or contention, one of the steps will be held up. In Chapter 8 you will see hOVJ the instruction cache on the MC68020 further improves performance by holding a set of instructions at the ready in fast onchip registers.

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